PROJECTS
riscv-proc - pipelined RV32 processor in SystemVerilog -
src
I used the book by H&H
for design and reference, and implemented a basic pipelined RISC-V 32-bit processor, with support for a few SIMD instructions.
This project helped me learn the pipelined design, some RISC-V design choices and instruction encodings, and let me practice SystemVerilog.
DOTFILES AND SCRIPTS
dots - personal config files and scripts - src
wpg - awk script that generates such webpages from a simpler markup -
code
The markup used is a mix of markdown and html, see some examples here
Usage: $ cat sample | ./wpg > sample.html
SOFTWARE I USE
OS
X11
dwm, st, dmenu - see suckless.org(1)
Way
Finally! - via neuswc, neuwld - see wayland.fyi(1)
I'm using wsxwm, st-wl, neumenu, swiv at the moment.
OTH